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Instruction tzcntq unsupported by the bounded, ddec validators #943
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You could look at other instances where we implemented support for new instructions in the validator (e.g. #934 is a recent one) to see what places you will likely need to change. Let us know if you have specific questions. |
Do you accept patches from outside the SPLG? |
We do. We may reject patches if they don't pass the tests, make major changes that we don't understand or would prevent us from doing our own work, but none of that should be an issue for something like adding support to more instruction in the validator. Maybe read |
In src/validator there's a readme. It's a little out of date but the big ideas should be right; the design for handlers hasn't changed much (if at all). I would recommend just looking in src/validator/handlers/simple_handler.cc, and copy how things are implemented to other instructions. The number one testing procedure is to run the fuzz tester on it. It's part of the test suite; there's an environment variable you can set to make it run longer. You can also tweak the code to test only the opcode you're adding (there's a comment in the source code that says how to do this). For safety, it's a good idea to introduce a bug, make sure the fuzz tester catches it, and then fix the bug, and make sure the fuzz tester passes. That's essentially our criteria for adding a new circuit. |
Thanks. By "circuit" I assume you mean the same thing as I would call "instruction"? This is somehow a term cross-pollination from the hardware synthesis world? It would be awesome to have a comment on how to run the fuzz tester and to limit to a new instruction in the README. I'll try to figure out how to run the fuzz tester and perhaps add that. Failing that, I'll ask here. |
I really dislike the term circuit and I think we shouldn't be using it, but it's usually interchangeable with "formula". In any case, what @bchurchill means by it is the formal specification in the validator of an instruction. The fuzz tester is run by the regular test suite. There are actually several different fuzzers, the one you want is called
to change the number of iteration it does (100 by default, I think). Limiting to a new instruction is done by uncommenting some code in |
The bmi instructions like
tzcntq
are pretty important bit manipulation instructions for some real-world kernels, but it seems like they are not supported by the solver-based validators:I'm happy to try to fix this if someone can point me to where the instruction behavior needs to be encoded.
Note that the
tzcnt
andlzcnt
family in particular are important given that the much olderbsf
andbsr
instructions are effectively unsupported as discussed in #939.The text was updated successfully, but these errors were encountered: