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Modified GPIO code to prevent low pulse when switching to Hi-Z mode. #1074

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merged 1 commit into from
Apr 30, 2024

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When code attempted to release the ports by placing them into Hi-Z mode, it would first clear the out register (so that weak pull-up would be disabled) then made the switch to Hi-Z. Since the signals were initially in output mode, clearing the out register caused a low pulse on the pins. One of the pins is the RESETN line which caused an unwanted device reset.

This PR changes the code to use the "NORMAL_HI_Z" mode that the MAX32625 supports. This mode places the pins in Hi-Z (no pull-up) regardless of the state of the out register.

See section 5.4.3 of the MAX32625 user guide for the I/O modes supported.

@mathias-arm mathias-arm merged commit 82dc31d into ARMmbed:main Apr 30, 2024
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ozersa added a commit to analogdevicesinc/max32625pico-firmware-images that referenced this pull request Jul 8, 2024
BL image generated from below SHA point
ARMmbed/DAPLink@82dc31d

Detail:
When code attempted to release the ports by placing them into Hi-Z mode,
it would first clear the out register (so that weak pull-up would be disabled)
then made the switch to Hi-Z. Since the signals were initially in output mode,
clearing the out register caused a low pulse on the pins. One of the pins is
the RESETN line which caused an unwanted device reset.

MAX32625PICO BL gpio is going to to use the "NORMAL_HI_Z" mode
that the MAX32625 supports.
This mode places the pins in Hi-Z (no pull-up) regardless of
the state of the out register.

PR: ARMmbed/DAPLink#1074

Signed-off-by: Sadik Ozer <[email protected]>
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