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riscv: dts: starfive: visionfive 2: Remove non-existing I2S hardware
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[ Upstream commit e0503d4 ]

This partially reverts
commit 92cfc35 ("riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1")

This added device tree nodes for I2S hardware that is not actually on the
VisionFive 2 board, but connected on the 40pin header. Many different extension
boards could be added on those pins, so this should be handled by overlays
instead.
This also conflicts with the TDM node which also attempts to grab GPIO 44:

  starfive-jh7110-sys-pinctrl 13040000.pinctrl: pin GPIO44 already requested by 10090000.tdm; cannot claim for 120c0000.i2s

Fixes: 92cfc35 ("riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1")
Signed-off-by: Hannah Peuckmann <[email protected]>
Reviewed-by: Emil Renner Berthing <[email protected]>
Tested-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
[ Backport from linux-6.10.y ]
Link: https://lore.kernel.org/all/ZQ2PR01MB13070BA638E892A5516DEA8CE6642@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn/
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: WangYuli <[email protected]>
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HannahPeuckmann authored and Avenger-285714 committed Sep 12, 2024
1 parent e11dfa1 commit 331ad05
Showing 1 changed file with 0 additions and 58 deletions.
58 changes: 0 additions & 58 deletions arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -229,24 +229,6 @@
status = "okay";
};

&i2srx {
pinctrl-names = "default";
pinctrl-0 = <&i2srx_pins>;
status = "okay";
};

&i2stx0 {
pinctrl-names = "default";
pinctrl-0 = <&mclk_ext_pins>;
status = "okay";
};

&i2stx1 {
pinctrl-names = "default";
pinctrl-0 = <&i2stx1_pins>;
status = "okay";
};

&mmc0 {
max-frequency = <100000000>;
assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
Expand Down Expand Up @@ -391,46 +373,6 @@
};
};

i2srx_pins: i2srx-0 {
clk-sd-pins {
pinmux = <GPIOMUX(38, GPOUT_LOW,
GPOEN_DISABLE,
GPI_SYS_I2SRX_BCLK)>,
<GPIOMUX(63, GPOUT_LOW,
GPOEN_DISABLE,
GPI_SYS_I2SRX_LRCK)>,
<GPIOMUX(38, GPOUT_LOW,
GPOEN_DISABLE,
GPI_SYS_I2STX1_BCLK)>,
<GPIOMUX(63, GPOUT_LOW,
GPOEN_DISABLE,
GPI_SYS_I2STX1_LRCK)>,
<GPIOMUX(61, GPOUT_LOW,
GPOEN_DISABLE,
GPI_SYS_I2SRX_SDIN0)>;
input-enable;
};
};

i2stx1_pins: i2stx1-0 {
sd-pins {
pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0,
GPOEN_ENABLE,
GPI_NONE)>;
bias-disable;
input-disable;
};
};

mclk_ext_pins: mclk-ext-0 {
mclk-ext-pins {
pinmux = <GPIOMUX(4, GPOUT_LOW,
GPOEN_DISABLE,
GPI_SYS_MCLK_EXT)>;
input-enable;
};
};

mmc0_pins: mmc0-0 {
rst-pins {
pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
Expand Down

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