Fix pins for ESP32S2 and ESP32C3. (#2407)

toitlang · Jun 21, 2024 · cd9606f · cd9606f
1 parent 8f4097d
commit cd9606f
Showing 1 changed file with 19 additions and 4 deletions.
diff --git a/src/resources/gpio_esp32.cc b/src/resources/gpio_esp32.cc
@@ -41,17 +41,32 @@ namespace toit {
 enum GpioState {
   GPIO_STATE_EDGE_TRIGGERED = 1,
 };
+/*
+GPIO summary:
+- Esp32: https://docs.espressif.com/projects/esp-idf/en/stable/esp32/api-reference/peripherals/gpio.html
+- Esp32c3: https://docs.espressif.com/projects/esp-idf/en/stable/esp32c3/api-reference/peripherals/gpio.html
+- Esp32s3: https://docs.espressif.com/projects/esp-idf/en/stable/esp32s3/api-reference/peripherals/gpio.html
+- Esp32s2: https://docs.espressif.com/projects/esp-idf/en/stable/esp32s2/api-reference/peripherals/gpio.html
+*/
 
 static ResourcePool<int, -1> gpio_pins(
     0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
     10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
-#ifdef CONFIG_IDF_TARGET_ESP32S3
+#ifdef CONFIG_IDF_TARGET_ESP32
+    21, 22, 23, 25, 26, 27,
+    32, 33, 34, 35, 36, 37, 38, 39
+#elif CONFIG_IDF_TARGET_ESP32C3
+    20, 21
+#elif CONFIG_IDF_TARGET_ESP32S3
     20, 21, 26, 27, 28, 29,
     30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
-    40, 41, 42, 43, 44, 45, 46, 47, 48, 49
+    40, 41, 42, 43, 44, 45, 46, 47, 48
+#elif CONFIG_IDF_TARGET_ESP32S2
+    20, 21, 26, 27, 28, 29,
+    30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
+    40, 41, 42, 43, 44, 45, 46
 #else
-    21, 22, 23, 25, 26, 27,
-    32, 33, 34, 35, 36, 37, 38, 39
+#error Unknown ESP32 target architecture
 #endif
 );